Job Detail

Job Description

FPGA/ASIC Design Engineer (Starlink) at SpaceX

Irvine, CA, United States

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.

FPGA/ASIC DESIGN ENGINEER (STARLINK)

Starlink has been building the world's largest constellation of satellites to provide internet to billion underserved people and bring the world closer together. The Starlink Silicon Team is seeking motivated, proactive, and intellectually curious engineers who can work with world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering). In this role, you will develop silicon projects that are driving cutting-edge next-generation ASIC/FPGA designs for deployment in space and ground infrastructures. The ideal candidate will be a hands-on self-starter who can execute the steps required to fully verify a complex digital design.

RESPONSIBILITIES:

• Design digital ASICs and/or FPGAs for Starlink projects, implementing complex SoC blocks and SoC integration tasks

• Implement or integrate design blocks using Verilog/SystemVerilog

• Participate in the design process starting with high-level conceptual and architectural discussions and ending with micro architecture and design partition within the ASIC and/or FPGA

• Participate in all phases of ASIC and/or FPGA design flow (e.g. synthesis, timing closure)

• Bring-up and validate ASICs and FPGAs in the lab

BASIC QUALIFICATIONS:

• Bachelor's degree in electrical engineering, computer engineering or computer science

• 1+ years of experience working with ASICs and/or FPGAs

PREFERRED SKILLS AND EXPERIENCE:

• ASIC/FPGA system integration experience

• Software design and development skills

• Excellent scripting skills (csh/bash, Perl, Python etc.)

• Experience with EDA tools such as HDL simulators (e.g. VCS, Questa, IES), HDL Lint tools (e.g. Spyglass), FPGA tools (e.g. Xilinx Vivado, Altera Quartus II)

• Ability to work in a dynamic environment with changing needs and requirements

• Team-player, can-do attitude and ability to work well in a group environment while still contributing on an individual basis

• Enjoys being challenged and learning new skills

ADDITIONAL REQUIREMENTS:

• Must be willing to travel when needed (typically <10%)

• Willing to work extended hours and weekends as needed to hit critical milestones

• This position can be based in either Redmond, WA or Irvine, CA

ITAR REQUIREMENTS:

• To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here (https://www.pmddtc.state.gov/?id=ddtc_kb_article_page&sys_id=24d528fddbfc930044f9ff621f961987) .

SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

Applicants wishing to view a copy of SpaceX's Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should notify the Human Resources Department at (310) 363-6000.

Job Detail

• Location:
  Irvine, California
• Company:
  SpaceX